拓冰网站定制 )
nerv这个项目同样是编写了Makefile的verilog项目不过它的项目显示是用SystemVerilog而不是verilog然而又又又没有用到SystemVerilog区别于verilog的特殊语法比如logic变量或者interface接口声明或者interface接口中的modport或者结构体struct及用于多个信号打包在一起类似于struct的pack也也也没有区别于always*的always_xxx这种增强的语法关键词但文件名却是.sv文件。还是基于老旧主机上的ubuntu22以及配套的iverilog, verilator, riscv64-unknown-elf-工具看看能否做到零门槛上手。chipcampchipcamp:~/src/riscv$ cat /etc/os-release ##ubuntu22系统十年旧机器。PRETTY_NAMEUbuntu 22.04 LTSNAMEUbuntuVERSION_ID22.04VERSION 22.04 (Jammy Jellyfish)VERSION_CODENAMEjammyIDubuntuID_LIKEdebianHOME_URLhttps://www.ubuntu.com/SUPPORT_URLhttps://help.ubuntu.com/BUG_REPORT_URLhttps://bugs.launchpad.net/ubuntu/PRIVACY_POLICY_URLhttps://www.ubuntu.com/legal/terms-and-policies/privacy-policyUBUNTU_CODENAMEjammychipcampchipcamp:~/src/riscv$ which iverilog/usr/bin/iverilogchipcampchipcamp:~/src/riscv$ which verilator/usr/bin/ verilatorchipcampchipcamp:~/src/riscv$ which gtkwave/usr/bin/gtkwavechipcampchipcamp:~/src/riscv$ which riscv64-unknown-elf-gcc/usr/bin/riscv64-unknown-elf-gccchipcampchipcamp:~/src/riscv$chipcampchipcamp:~/src/riscv$ dpkg-query -S /usr/bin/iverilog /usr/bin/verilator /usr/bin/gtkwave /usr/bin/riscv64-unknown-elf-gcciverilog: /usr/bin/iverilogverilator: /usr/bin/verilatorgtkwave: /usr/bin/gtkwavegcc-riscv64-unknown-elf: /usr/bin/riscv64-unknown-elf-gcc------以上所有的软件都是使用apt-get install安装的这是本文所说的“0依赖”。------看看能不能零门槛体验结果在这个环境里失败了。如下所示。chipcampchipcamp:~/src/riscv$ git clone https://gitcode.com/chipcamp/nerv.gitCloning into nerv...remote: Enumerating objects: 615, done.remote: Total 615 (delta 0), reused 0 (delta 0), pack-reused 615 (from 1)Receiving objects: 100% (615/615), 3.85 MiB | 538.00 KiB/s, done.Resolving deltas: 100% (387/387), done.chipcampchipcamp:~/src/riscv$ cd nervchipcampchipcamp:~/src/riscv/nerv$ ls -latotal 184drwxrwxr-x 6 chipcamp chipcamp 4096 Oct 7 12:39 .drwxrwxr-x 5 chipcamp chipcamp 4096 Oct 7 12:39 ..drwxrwxr-x 2 chipcamp chipcamp 4096 Oct 7 12:39 axi_cache-rw-rw-r-- 1 chipcamp chipcamp 1849 Oct 7 12:39 cexdata.sh-rw-rw-r-- 1 chipcamp chipcamp 2133 Oct 7 12:39 checks.cfg-rw-rw-r-- 1 chipcamp chipcamp 853 Oct 7 12:39 COPYING-rw-rw-r-- 1 chipcamp chipcamp 2190 Oct 7 12:39 disasm.pydrwxrwxr-x 2 chipcamp chipcamp 4096 Oct 7 12:39 docsdrwxrwxr-x 3 chipcamp chipcamp 4096 Oct 7 12:39 examples-rw-rw-r-- 1 chipcamp chipcamp 1524 Oct 7 12:39 firmware.c-rw-rw-r-- 1 chipcamp chipcamp 2178 Oct 7 12:39 firmware.sdrwxrwxr-x 8 chipcamp chipcamp 4096 Oct 7 12:39 .git-rw-rw-r-- 1 chipcamp chipcamp 106 Oct 7 12:39 .gitignore-rw-rw-r-- 1 chipcamp chipcamp 532 Oct 7 12:39 imemcheck.sby-rw-rw-r-- 1 chipcamp chipcamp 2310 Oct 7 12:39 imemcheck.sv-rw-rw-r-- 1 chipcamp chipcamp 1899 Oct 7 12:39 Makefile-rw-rw-r-- 1 chipcamp chipcamp 24235 Oct 7 12:39 NERV.png-rw-rw-r-- 1 chipcamp chipcamp 2339 Oct 7 12:39 nervsoc.sv-rw-rw-r-- 1 chipcamp chipcamp 53665 Oct 7 12:39 nerv.sv-rw-rw-r-- 1 chipcamp chipcamp 1173 Oct 7 12:39 README.md-rw-rw-r-- 1 chipcamp chipcamp 2505 Oct 7 12:39 sections.lds-rw-rw-r-- 1 chipcamp chipcamp 3269 Oct 7 12:39 testbench.gtkw-rw-rw-r-- 1 chipcamp chipcamp 9733 Oct 7 12:39 testbench.sv-rw-rw-r-- 1 chipcamp chipcamp 3918 Oct 7 12:39 trace.gtkw-rw-rw-r-- 1 chipcamp chipcamp 3323 Oct 7 12:39 vectors.s-rw-rw-r-- 1 chipcamp chipcamp 3883 Oct 7 12:39 wrapper.svchipcampchipcamp:~/src/riscv/nerv$ more Makefile# NERV -- Naive Educational RISC-V Processor#TOOLCHAIN_PREFIX?riscv64-unknown-elf-RISCV_ARCH?rv32i$(shell $(TOOLCHAIN_PREFIX)as -marchrv32i_zicsr --dump-config 2/dev/null echo _zicsr)test: firmware.hex testbenchvvp -N testbench vcdfirmware.elf: firmware.s vectors.s firmware.c$(TOOLCHAIN_PREFIX)gcc -march$(RISCV_ARCH) -mabiilp32 -Os -Wall -Wextra -Wl,-Bstatic,-T,sections.lds,--strip-debug -ffreestanding -nostdlib -o $ $^firmware.hex: firmware.elf$(TOOLCHAIN_PREFIX)objcopy -O verilog $ $testbench: testbench.sv nerv.sviverilog -g2012 -o testbench -D STALL -D NERV_DBGREGS testbench.sv nerv.svchecks:python3 ../../checks/genchecks.py$(MAKE) -C checkscheck: checksbash cexdata.shcat cexdata/warnings.txtcat cexdata/status.txtshow:gtkwave testbench.vcd testbench.gtkw gtkwave.log 21 trace:gtkwave cexdata/checks_$(TRACE_CHECK)_ch0.vcd trace.gtkw gtkwave.log 21 clean:rm -rf firmware.elf firmware.hex testbench testbench.vcd gtkwave.logrm -rf disasm.o disasm.s checks/ cexdata/chipcampchipcamp:~/src/riscv/nerv$ makeriscv64-unknown-elf-gcc -marchrv32i_zicsr -mabiilp32-Os -Wall -Wextra -Wl,-Bstatic,-T,sections.lds,--strip-debug -ffreestanding -nostdlib -o firmware.elf firmware.s vectors.s firmware.ccc1: error: -marchrv32i_zicsr: unsupported ISA subset zmake: *** [Makefile:26: firmware.elf] Error 1chipcampchipcamp:~/src/riscv/nerv$ riscv64-unknown-elf-gcc --versionriscv64-unknown-elf-gcc () 10.2.0Copyright (C) 2020 Free Software Foundation, Inc.This is free software; see the source for copying conditions. There is NOwarranty; not even for MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.chipcampchipcamp:~/src/riscv/nerv$换一个环境是ubuntu24的LTS版本则可以了。记录如下。chipcampChipCamp:~/src/temp$ git clone https://gitcode.com/chipcamp/nerv.gitCloning into nerv...remote: Enumerating objects: 615, done.remote: Total 615 (delta 0), reused 0 (delta 0), pack-reused 615 (from 1)Receiving objects: 100% (615/615), 3.85 MiB | 697.00 KiB/s, done.Resolving deltas: 100% (387/387), done.chipcampChipCamp:~/src/temp$ dateWed Oct 7 13:13:25 CST 2026chipcampChipCamp:~/src/temp$ cd nervchipcampChipCamp:~/src/temp/nerv$ ls -ltotal 168-rw-rw-r-- 1 chipcamp chipcamp 853 Oct 7 13:13 COPYING-rw-rw-r-- 1 chipcamp chipcamp 1899 Oct 7 13:13 Makefile-rw-rw-r-- 1 chipcamp chipcamp 24235 Oct 7 13:13 NERV.png-rw-rw-r-- 1 chipcamp chipcamp 1173 Oct 7 13:13 README.mddrwxrwxr-x 2 chipcamp chipcamp 4096 Oct 7 13:13 axi_cache-rw-rw-r-- 1 chipcamp chipcamp 1849 Oct 7 13:13 cexdata.sh-rw-rw-r-- 1 chipcamp chipcamp 2133 Oct 7 13:13 checks.cfg-rw-rw-r-- 1 chipcamp chipcamp 2190 Oct 7 13:13 disasm.pydrwxrwxr-x 2 chipcamp chipcamp 4096 Oct 7 13:13 docsdrwxrwxr-x 3 chipcamp chipcamp 4096 Oct 7 13:13 examples-rw-rw-r-- 1 chipcamp chipcamp 1524 Oct 7 13:13 firmware.c-rw-rw-r-- 1 chipcamp chipcamp 2178 Oct 7 13:13 firmware.s-rw-rw-r-- 1 chipcamp chipcamp 532 Oct 7 13:13 imemcheck.sby-rw-rw-r-- 1 chipcamp chipcamp 2310 Oct 7 13:13 imemcheck.sv-rw-rw-r-- 1 chipcamp chipcamp 53665 Oct 7 13:13 nerv.sv-rw-rw-r-- 1 chipcamp chipcamp 2339 Oct 7 13:13 nervsoc.sv-rw-rw-r-- 1 chipcamp chipcamp 2505 Oct 7 13:13 sections.lds-rw-rw-r-- 1 chipcamp chipcamp 3269 Oct 7 13:13 testbench.gtkw-rw-rw-r-- 1 chipcamp chipcamp 9733 Oct 7 13:13 testbench.sv-rw-rw-r-- 1 chipcamp chipcamp 3918 Oct 7 13:13 trace.gtkw-rw-rw-r-- 1 chipcamp chipcamp 3323 Oct 7 13:13 vectors.s-rw-rw-r-- 1 chipcamp chipcamp 3883 Oct 7 13:13 wrapper.svchipcampChipCamp:~/src/temp/nerv$ makeriscv64-unknown-elf-gcc -marchrv32i_zicsr -mabiilp32-Os -Wall -Wextra -Wl,-Bstatic,-T,sections.lds,--strip-debug -ffreestanding -nostdlib -o firmware.elf firmware.s vectors.s firmware.c/usr/lib/gcc/riscv64-unknown-elf/13.2.0/../../../riscv64-unknown-elf/bin/ld: warning: firmware.elf has a LOAD segment with RWX permissionsriscv64-unknown-elf-objcopy -O verilog firmware.elf firmware.hexiverilog -g2012 -o testbench -D STALL -D NERV_DBGREGS testbench.sv nerv.svnerv.sv:687: vvp.tgt sorry: Case unique/unique0 qualities are ignored.vvp -N testbench vcdVCD info: dumpfile testbench.vcd opened for output.Hello World!Hello World again-----LUSimulated 889 cyclestestbench.sv:249: $finish called at 8900 (1s)chipcampChipCamp:~/src/temp/nerv$ /usr/bin/riscv64-unknown-elf-gcc --versionriscv64-unknown-elf-gcc (13.2.0-11ubuntu112) 13.2.0Copyright (C) 2023 Free Software Foundation, Inc.This is free software; see the source for copying conditions. There is NOwarranty; not even for MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.chipcampChipCamp:~/src/temp/nerv$ cat /etc/os-releasePRETTY_NAMEUbuntu 24.04.3 LTSNAMEUbuntuVERSION_ID24.04VERSION24.04.3 LTS (Noble Numbat)VERSION_CODENAMEnobleIDubuntuID_LIKEdebianHOME_URLhttps://www.ubuntu.com/SUPPORT_URLhttps://help.ubuntu.com/BUG_REPORT_URLhttps://bugs.launchpad.net/ubuntu/PRIVACY_POLICY_URLhttps://www.ubuntu.com/legal/terms-and-policies/privacy-policyUBUNTU_CODENAMEnobleLOGOubuntu-logochipcampChipCamp:~/src/temp/nerv$----可以看出nerv项目在Ubuntu24.04 LTS版本及配套的riscv64-unknown-elf-gcc 13.2.0下是一键Make运行的。----考虑到现在的时间点Ubuntu24.04LTS不算很老因此nerv仍然可以认为是零门槛体验的。----顺便看一下上一个例子darkriscv的make all失败在riscv64-unknown-elf-gcc编译过程中看看在Ubuntu24.04 LTS with riscv-gcc-13.2是否还存在。如下。chipcampChipCamp:~/src/temp/nerv$ /usr/bin/riscv64-unknown-elf-gcc --versionriscv64-unknown-elf-gcc (13.2.0-11ubuntu112) 13.2.0Copyright (C) 2023 Free Software Foundation, Inc.This is free software; see the source for copying conditions. There is NOwarranty; not even for MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.chipcampChipCamp:~/src/temp/nerv$ cat /etc/os-releasePRETTY_NAMEUbuntu 24.04.3 LTSNAMEUbuntuVERSION_ID24.04VERSION24.04.3 LTS (Noble Numbat)VERSION_CODENAMEnobleIDubuntuID_LIKEdebianHOME_URLhttps://www.ubuntu.com/SUPPORT_URLhttps://help.ubuntu.com/BUG_REPORT_URLhttps://bugs.launchpad.net/ubuntu/PRIVACY_POLICY_URLhttps://www.ubuntu.com/legal/terms-and-policies/privacy-policyUBUNTU_CODENAMEnobleLOGOubuntu-logochipcampChipCamp:~/src/temp/nerv$ cd ..chipcampChipCamp:~/src/temp$ git clone https://gitcode.com/chipcamp/darkriscv.gitCloning into darkriscv...remote: Enumerating objects: 3796, done.remote: Total 3796 (delta 0), reused 0 (delta 0), pack-reused 3796 (from 1)Receiving objects: 100% (3796/3796), 4.96 MiB | 698.00 KiB/s, done.Resolving deltas: 100% (2536/2536), done.chipcampChipCamp:~/src/temp$ cd darkriscvchipcampChipCamp:~/src/temp/darkriscv$ make allmake -C src allmake[1]: Entering directory /home/chipcamp/src/temp/darkriscv/src/usr/bin/riscv64-unknown-elf-gcc-marchrv32i_zicsr-mabiilp32-mlittle-endian-c -o boot.o boot.S/usr/bin/riscv64-unknown-elf-cpp -P -DMLEN$(awk /define MLEN/ { print 2**$3 } ../rtl/config.vh) darksocv.lds darksocv.ldmake -C darkshell allmake[2]: Entering directory /home/chipcamp/src/temp/darkriscv/src/darkshell/usr/bin/riscv64-unknown-elf-gcc -Wall -fcommon -ffreestanding -Os -fno-delete-null-pointer-checks-mlittle-endian-marchrv32i_zicsr -mabiilp32 -Idarklibc/include -I../darklibc/include -D__RISCV__ -DBUILD\Wed, 07 Oct 2026 13:36:01 0800\ -DARCH\rv32i_zicsr\ -mno-div -mcmodelmedany -S main.c -o main.s/usr/bin/riscv64-unknown-elf-as -marchrv32i_zicsr -mabiilp32-mlittle-endian-c main.s -o main.o/usr/bin/riscv64-unknown-elf-ar -rcs darkshell.a main.o/usr/bin/riscv64-unknown-elf-ranlib darkshell.asources ok for darkshell.a.make[2]: Leaving directory /home/chipcamp/src/temp/darkriscv/src/darkshellmake -C darklibc allmake[2]: Entering directory /home/chipcamp/src/temp/darkriscv/src/darklibc/usr/bin/riscv64-unknown-elf-gcc -Wall -fcommon -ffreestanding -Os -fno-delete-null-pointer-checks-mlittle-endian-marchrv32i_zicsr -mabiilp32 -Idarklibc/include -I../darklibc/include -D__RISCV__ -DBUILD\Wed, 07 Oct 2026 13:36:01 0800\ -DARCH\rv32i_zicsr\ -mno-div -mcmodelmedany -Iinclude -S stdio.c -o stdio.s/usr/bin/riscv64-unknown-elf-gcc -Wall -fcommon -ffreestanding -Os -fno-delete-null-pointer-checks-mlittle-endian-marchrv32i_zicsr -mabiilp32 -Idarklibc/include -I../darklibc/include -D__RISCV__ -DBUILD\Wed, 07 Oct 2026 13:36:01 0800\ -DARCH\rv32i_zicsr\ -mno-div -mcmodelmedany -Iinclude -S io.c -o io.s/usr/bin/riscv64-unknown-elf-gcc -Wall -fcommon -ffreestanding -Os -fno-delete-null-pointer-checks-mlittle-endian-marchrv32i_zicsr -mabiilp32 -Idarklibc/include -I../darklibc/include -D__RISCV__ -DBUILD\Wed, 07 Oct 2026 13:36:01 0800\ -DARCH\rv32i_zicsr\ -mno-div -mcmodelmedany -Iinclude -S string.c -o string.s/usr/bin/riscv64-unknown-elf-gcc -Wall -fcommon -ffreestanding -Os -fno-delete-null-pointer-checks-mlittle-endian-marchrv32i_zicsr -mabiilp32 -Idarklibc/include -I../darklibc/include -D__RISCV__ -DBUILD\Wed, 07 Oct 2026 13:36:01 0800\ -DARCH\rv32i_zicsr\ -mno-div -mcmodelmedany -Iinclude -S misc.c -o misc.s/usr/bin/riscv64-unknown-elf-gcc -Wall -fcommon -ffreestanding -Os -fno-delete-null-pointer-checks-mlittle-endian-marchrv32i_zicsr -mabiilp32 -Idarklibc/include -I../darklibc/include -D__RISCV__ -DBUILD\Wed, 07 Oct 2026 13:36:01 0800\ -DARCH\rv32i_zicsr\ -mno-div -mcmodelmedany -Iinclude -S unistd.c -o unistd.s/usr/bin/riscv64-unknown-elf-as -marchrv32i_zicsr -mabiilp32 -mlittle-endian -c stdio.s -o stdio.o/usr/bin/riscv64-unknown-elf-as -marchrv32i_zicsr -mabiilp32 -mlittle-endian -c io.s -o io.o/usr/bin/riscv64-unknown-elf-as -marchrv32i_zicsr -mabiilp32 -mlittle-endian -c string.s -o string.o/usr/bin/riscv64-unknown-elf-as -marchrv32i_zicsr -mabiilp32 -mlittle-endian -c misc.s -o misc.o/usr/bin/riscv64-unknown-elf-as -marchrv32i_zicsr -mabiilp32 -mlittle-endian -c unistd.s -o unistd.o/usr/bin/riscv64-unknown-elf-gcc -marchrv32i_zicsr -mabiilp32 -mlittle-endian -c -o util.o util.S/usr/bin/riscv64-unknown-elf-ar -rcs darklibc.a stdio.o io.o string.o misc.o unistd.o util.o/usr/bin/riscv64-unknown-elf-ranlib darklibc.asources ok for darklibc.a.make[2]: Leaving directory /home/chipcamp/src/temp/darkriscv/src/darklibc#/usr/bin/riscv64-unknown-elf-ranlib darkshell/darkshell.a darklibc/darklibc.a/usr/bin/riscv64-unknown-elf-ld -Tdarksocv.ld -Mapdarksocv.map -m elf32lriscv -static -gc-sections --entry_start -o darksocv.o boot.o darkshell/darkshell.a darklibc/darklibc.a/usr/bin/riscv64-unknown-elf-ld: warning: darksocv.o has a LOAD segment with RWX permissions/usr/bin/riscv64-unknown-elf-objdump -D darksocv.o darksocv.S/usr/bin/riscv64-unknown-elf-objcopy -O binary darksocv.o darksocv.binhexdump -ve 1/4 %08x\n darksocv.bin darksocv.memdd ifdarksocv.bin ofdarksocv_uart.bin skip512 bs174400 records in74400 records out7440 bytes (7.4 kB, 7.3 KiB) copied, 0.00403438 s, 1.8 MB/srm darksocv.bin# uncomment for MIF file#awk BEGIN { print DEPTH 1024;\nWIDTH 32;\nADDRESS_RADIX HEX;\nDATA_RADIX HEX;\nCONTENT\nBEGIN } { printf(%08x : %s\n,NR-1,); } END { print END; } darksocv.mem darksocv.mifwc -l darksocv.mem1988 darksocv.memmem ok for little-endian.echo build is ok for darksocv.membuild is ok for darksocv.memmake[1]: Leaving directory /home/chipcamp/src/temp/darkriscv/srcmake -C sim allmake[1]: Entering directory /home/chipcamp/src/temp/darkriscv/simiverilog -Wall -I ../rtl -o darksocv darksimv.v ../rtl/darksocv.v ../rtl/darkbridge.v ../rtl/darkuart.v ../rtl/darkriscv.v ../rtl/darkpll.v ../rtl/darkram.v ../rtl/darkio.v ../rtl/darkcache.v ../rtl/darkmac.v ../rtl/lib/sdram/mt48lc16m16a2_ctrl.vecho VCDSdarksocv.vcd: XSIMdarksocvVCDSdarksocv.vcd: XSIMdarksocvdpram: unified BRAM w/ 2048x32-bitWARNING: ../rtl/darkram.v:88: $readmemh(../src/darksocv.mem): Not enough words in the file for the requested range [0:2047].VCD info: dumpfile darksocv.vcd opened for output.reset (startup)sdram: CLK: 64 MHzsdram: WAIT_100US: 6400 cyclessdram: TRP: 2 cyclessdram: TRC: 5 cyclessdram: TRCD: 2 cyclessdram: TCH: 1 cyclessdram: CAS_LATENCY: 2 cyclesvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvrrrrrrrrrrrrr vvvvvvvvvvvvvvvvvvvvvvvvvvrrrrrrrrrrrrrrrr vvvvvvvvvvvvvvvvvvvvvvvvrrrrrrrrrrrrrrrrrr vvvvvvvvvvvvvvvvvvvvvvvvrrrrrrrrrrrrrrrrrr vvvvvvvvvvvvvvvvvvvvvvvvrrrrrrrrrrrrrrrrrr vvvvvvvvvvvvvvvvvvvvvvvvrrrrrrrrrrrrrrrr vvvvvvvvvvvvvvvvvvvvvvrrrrrrrrrrrrr vvvvvvvvvvvvvvvvvvvvvvrr vvvvvvvvvvvvvvvvvvvvvvrr vvvvvvvvvvvvvvvvvvvvvvvv rrrrrr vvvvvvvvvvvvvvvvvvvvvvvvvv rrrrrrrrrr vvvvvvvvvvvvvvvvvvvvvv rrrrrrrrrrrrrr vvvvvvvvvvvvvvvvvv rrrrrrrrrrrrrrrrrr vvvvvvvvvvvvvv rrrrrrrrrrrrrrrrrrrrrr vvvvvvvvvv rrrrrrrrrrrrrrrrrrrrrrrrrr vvvvvv rrrrrrrrrrrrrrrrrrrrrrrrrrrrrr vv rrrrrrrrrrrrrrrrrrrrrrrrrrrrrrrrrr rrrrrrrrrrrrrrrrrrrrrrrrrrrrrrrrrrrrrr rrrrrrrrrrrrrrrrrrrrrrrrrrrrrrrrrrrrrrrrrr rrrrrrrrrrrrrrrrrrrrrrINSTRUCTION SETS WANT TO BE FREEboot0: main0200 stack1f7cboard: simulation only (id0)build: Wed, 07 Oct 2026 13:36:01 0800 for rv32i_zicsrcore0: darkriscv100MHz rv32i little-endianbram0: text02001418 data161808f8 stack2000bram0: 240 bytes freeuart0: 115.2kbps (div25603)timr0: 1000Hz (div99999)csrxx: not foundstvec: not foundmtvec: not found (polling)Welcome to DarkRISCV!495 ^C** VVP Stop(0) **** Flushing output streams.** Current simulation time is 509455000 ticks. finish** Continue **make[1]: *** [Makefile:98: darksocv.vcd] Interruptmake: *** [Makefile:47: all] InterruptchipcampChipCamp:~/src/temp/darkriscv$----没有问题。改用Ubuntu 24.04 LTS系统配套的riscv64-unknown-elf-gcc则是13.2版本darkriscv项目的firmware.hex就可以正常编译了在Ubuntu 22.04 LTS版本下gcc版本低而出现的-mlittle-endian选项不支持的问题消失了。完END关键词nerv, riscv64-unknown-elf-gcc, systemverilog, interface, modport, pack, struct, always_ff。摘要本文记录了开源RISC-V项目nerv的make体验过程。在Ubuntu 22.04 LTS所配套的riscv-gcc-10.x版本不支持-mlittle-entian而build失败的问题在Ubuntu 24.04 LTS所配套的riscv-gcc-13.2版本则没有问题。这个nerv项目虽然以.sv文件标示SystemVerilog语言但实际上它没有使用SystemVerilog相对Verilog语言的任何主要语法如interfacemodportpackstructalways_ff等。附送Verilog vs SystemVerilog Summary。END of 附录 零门槛上手的RISC-V项目：nerv(附Verilog-vs-SysVerilog)
nerv这个项目同样是编写了Makefile的verilog项目不过它的项目显示是用SystemVerilog而不是verilog然而又又又没有用到SystemVerilog区别于verilog的特殊语法比如logic变量或者interface接口声明或者interface接口中的modport或者结构体struct及用于多个信号打包在一起类似于struct的pack也也也没有区别于always*的always_xxx这种增强的语法关键词但文件名却是.sv文件。还是基于老旧主机上的ubuntu22以及配套的iverilog, verilator, riscv64-unknown-elf-工具看看能否做到零门槛上手。chipcampchipcamp:~/src/riscv$ cat /etc/os-release ##ubuntu22系统十年旧机器。PRETTY_NAMEUbuntu 22.04 LTSNAMEUbuntuVERSION_ID22.04VERSION 22.04 (Jammy Jellyfish)VERSION_CODENAMEjammyIDubuntuID_LIKEdebianHOME_URLhttps://www.ubuntu.com/SUPPORT_URLhttps://help.ubuntu.com/BUG_REPORT_URLhttps://bugs.launchpad.net/ubuntu/PRIVACY_POLICY_URLhttps://www.ubuntu.com/legal/terms-and-policies/privacy-policyUBUNTU_CODENAMEjammychipcampchipcamp:~/src/riscv$ which iverilog/usr/bin/iverilogchipcampchipcamp:~/src/riscv$ which verilator/usr/bin/ verilatorchipcampchipcamp:~/src/riscv$ which gtkwave/usr/bin/gtkwavechipcampchipcamp:~/src/riscv$ which riscv64-unknown-elf-gcc/usr/bin/riscv64-unknown-elf-gccchipcampchipcamp:~/src/riscv$chipcampchipcamp:~/src/riscv$ dpkg-query -S /usr/bin/iverilog /usr/bin/verilator /usr/bin/gtkwave /usr/bin/riscv64-unknown-elf-gcciverilog: /usr/bin/iverilogverilator: /usr/bin/verilatorgtkwave: /usr/bin/gtkwavegcc-riscv64-unknown-elf: /usr/bin/riscv64-unknown-elf-gcc------以上所有的软件都是使用apt-get install安装的这是本文所说的“0依赖”。------看看能不能零门槛体验结果在这个环境里失败了。如下所示。chipcampchipcamp:~/src/riscv$ git clone https://gitcode.com/chipcamp/nerv.gitCloning into nerv...remote: Enumerating objects: 615, done.remote: Total 615 (delta 0), reused 0 (delta 0), pack-reused 615 (from 1)Receiving objects: 100% (615/615), 3.85 MiB | 538.00 KiB/s, done.Resolving deltas: 100% (387/387), done.chipcampchipcamp:~/src/riscv$ cd nervchipcampchipcamp:~/src/riscv/nerv$ ls -latotal 184drwxrwxr-x 6 chipcamp chipcamp 4096 Oct 7 12:39 .drwxrwxr-x 5 chipcamp chipcamp 4096 Oct 7 12:39 ..drwxrwxr-x 2 chipcamp chipcamp 4096 Oct 7 12:39 axi_cache-rw-rw-r-- 1 chipcamp chipcamp 1849 Oct 7 12:39 cexdata.sh-rw-rw-r-- 1 chipcamp chipcamp 2133 Oct 7 12:39 checks.cfg-rw-rw-r-- 1 chipcamp chipcamp 853 Oct 7 12:39 COPYING-rw-rw-r-- 1 chipcamp chipcamp 2190 Oct 7 12:39 disasm.pydrwxrwxr-x 2 chipcamp chipcamp 4096 Oct 7 12:39 docsdrwxrwxr-x 3 chipcamp chipcamp 4096 Oct 7 12:39 examples-rw-rw-r-- 1 chipcamp chipcamp 1524 Oct 7 12:39 firmware.c-rw-rw-r-- 1 chipcamp chipcamp 2178 Oct 7 12:39 firmware.sdrwxrwxr-x 8 chipcamp chipcamp 4096 Oct 7 12:39 .git-rw-rw-r-- 1 chipcamp chipcamp 106 Oct 7 12:39 .gitignore-rw-rw-r-- 1 chipcamp chipcamp 532 Oct 7 12:39 imemcheck.sby-rw-rw-r-- 1 chipcamp chipcamp 2310 Oct 7 12:39 imemcheck.sv-rw-rw-r-- 1 chipcamp chipcamp 1899 Oct 7 12:39 Makefile-rw-rw-r-- 1 chipcamp chipcamp 24235 Oct 7 12:39 NERV.png-rw-rw-r-- 1 chipcamp chipcamp 2339 Oct 7 12:39 nervsoc.sv-rw-rw-r-- 1 chipcamp chipcamp 53665 Oct 7 12:39 nerv.sv-rw-rw-r-- 1 chipcamp chipcamp 1173 Oct 7 12:39 README.md-rw-rw-r-- 1 chipcamp chipcamp 2505 Oct 7 12:39 sections.lds-rw-rw-r-- 1 chipcamp chipcamp 3269 Oct 7 12:39 testbench.gtkw-rw-rw-r-- 1 chipcamp chipcamp 9733 Oct 7 12:39 testbench.sv-rw-rw-r-- 1 chipcamp chipcamp 3918 Oct 7 12:39 trace.gtkw-rw-rw-r-- 1 chipcamp chipcamp 3323 Oct 7 12:39 vectors.s-rw-rw-r-- 1 chipcamp chipcamp 3883 Oct 7 12:39 wrapper.svchipcampchipcamp:~/src/riscv/nerv$ more Makefile# NERV -- Naive Educational RISC-V Processor#TOOLCHAIN_PREFIX?riscv64-unknown-elf-RISCV_ARCH?rv32i$(shell $(TOOLCHAIN_PREFIX)as -marchrv32i_zicsr --dump-config 2/dev/null echo _zicsr)test: firmware.hex testbenchvvp -N testbench vcdfirmware.elf: firmware.s vectors.s firmware.c$(TOOLCHAIN_PREFIX)gcc -march$(RISCV_ARCH) -mabiilp32 -Os -Wall -Wextra -Wl,-Bstatic,-T,sections.lds,--strip-debug -ffreestanding -nostdlib -o $ $^firmware.hex: firmware.elf$(TOOLCHAIN_PREFIX)objcopy -O verilog $ $testbench: testbench.sv nerv.sviverilog -g2012 -o testbench -D STALL -D NERV_DBGREGS testbench.sv nerv.svchecks:python3 ../../checks/genchecks.py$(MAKE) -C checkscheck: checksbash cexdata.shcat cexdata/warnings.txtcat cexdata/status.txtshow:gtkwave testbench.vcd testbench.gtkw gtkwave.log 21 trace:gtkwave cexdata/checks_$(TRACE_CHECK)_ch0.vcd trace.gtkw gtkwave.log 21 clean:rm -rf firmware.elf firmware.hex testbench testbench.vcd gtkwave.logrm -rf disasm.o disasm.s checks/ cexdata/chipcampchipcamp:~/src/riscv/nerv$ makeriscv64-unknown-elf-gcc -marchrv32i_zicsr -mabiilp32-Os -Wall -Wextra -Wl,-Bstatic,-T,sections.lds,--strip-debug -ffreestanding -nostdlib -o firmware.elf firmware.s vectors.s firmware.ccc1: error: -marchrv32i_zicsr: unsupported ISA subset zmake: *** [Makefile:26: firmware.elf] Error 1chipcampchipcamp:~/src/riscv/nerv$ riscv64-unknown-elf-gcc --versionriscv64-unknown-elf-gcc () 10.2.0Copyright (C) 2020 Free Software Foundation, Inc.This is free software; see the source for copying conditions. There is NOwarranty; not even for MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.chipcampchipcamp:~/src/riscv/nerv$换一个环境是ubuntu24的LTS版本则可以了。记录如下。chipcampChipCamp:~/src/temp$ git clone https://gitcode.com/chipcamp/nerv.gitCloning into nerv...remote: Enumerating objects: 615, done.remote: Total 615 (delta 0), reused 0 (delta 0), pack-reused 615 (from 1)Receiving objects: 100% (615/615), 3.85 MiB | 697.00 KiB/s, done.Resolving deltas: 100% (387/387), done.chipcampChipCamp:~/src/temp$ dateWed Oct 7 13:13:25 CST 2026chipcampChipCamp:~/src/temp$ cd nervchipcampChipCamp:~/src/temp/nerv$ ls -ltotal 168-rw-rw-r-- 1 chipcamp chipcamp 853 Oct 7 13:13 COPYING-rw-rw-r-- 1 chipcamp chipcamp 1899 Oct 7 13:13 Makefile-rw-rw-r-- 1 chipcamp chipcamp 24235 Oct 7 13:13 NERV.png-rw-rw-r-- 1 chipcamp chipcamp 1173 Oct 7 13:13 README.mddrwxrwxr-x 2 chipcamp chipcamp 4096 Oct 7 13:13 axi_cache-rw-rw-r-- 1 chipcamp chipcamp 1849 Oct 7 13:13 cexdata.sh-rw-rw-r-- 1 chipcamp chipcamp 2133 Oct 7 13:13 checks.cfg-rw-rw-r-- 1 chipcamp chipcamp 2190 Oct 7 13:13 disasm.pydrwxrwxr-x 2 chipcamp chipcamp 4096 Oct 7 13:13 docsdrwxrwxr-x 3 chipcamp chipcamp 4096 Oct 7 13:13 examples-rw-rw-r-- 1 chipcamp chipcamp 1524 Oct 7 13:13 firmware.c-rw-rw-r-- 1 chipcamp chipcamp 2178 Oct 7 13:13 firmware.s-rw-rw-r-- 1 chipcamp chipcamp 532 Oct 7 13:13 imemcheck.sby-rw-rw-r-- 1 chipcamp chipcamp 2310 Oct 7 13:13 imemcheck.sv-rw-rw-r-- 1 chipcamp chipcamp 53665 Oct 7 13:13 nerv.sv-rw-rw-r-- 1 chipcamp chipcamp 2339 Oct 7 13:13 nervsoc.sv-rw-rw-r-- 1 chipcamp chipcamp 2505 Oct 7 13:13 sections.lds-rw-rw-r-- 1 chipcamp chipcamp 3269 Oct 7 13:13 testbench.gtkw-rw-rw-r-- 1 chipcamp chipcamp 9733 Oct 7 13:13 testbench.sv-rw-rw-r-- 1 chipcamp chipcamp 3918 Oct 7 13:13 trace.gtkw-rw-rw-r-- 1 chipcamp chipcamp 3323 Oct 7 13:13 vectors.s-rw-rw-r-- 1 chipcamp chipcamp 3883 Oct 7 13:13 wrapper.svchipcampChipCamp:~/src/temp/nerv$ makeriscv64-unknown-elf-gcc -marchrv32i_zicsr -mabiilp32-Os -Wall -Wextra -Wl,-Bstatic,-T,sections.lds,--strip-debug -ffreestanding -nostdlib -o firmware.elf firmware.s vectors.s firmware.c/usr/lib/gcc/riscv64-unknown-elf/13.2.0/../../../riscv64-unknown-elf/bin/ld: warning: firmware.elf has a LOAD segment with RWX permissionsriscv64-unknown-elf-objcopy -O verilog firmware.elf firmware.hexiverilog -g2012 -o testbench -D STALL -D NERV_DBGREGS testbench.sv nerv.svnerv.sv:687: vvp.tgt sorry: Case unique/unique0 qualities are ignored.vvp -N testbench vcdVCD info: dumpfile testbench.vcd opened for output.Hello World!Hello World again-----LUSimulated 889 cyclestestbench.sv:249: $finish called at 8900 (1s)chipcampChipCamp:~/src/temp/nerv$ /usr/bin/riscv64-unknown-elf-gcc --versionriscv64-unknown-elf-gcc (13.2.0-11ubuntu112) 13.2.0Copyright (C) 2023 Free Software Foundation, Inc.This is free software; see the source for copying conditions. There is NOwarranty; not even for MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.chipcampChipCamp:~/src/temp/nerv$ cat /etc/os-releasePRETTY_NAMEUbuntu 24.04.3 LTSNAMEUbuntuVERSION_ID24.04VERSION24.04.3 LTS (Noble Numbat)VERSION_CODENAMEnobleIDubuntuID_LIKEdebianHOME_URLhttps://www.ubuntu.com/SUPPORT_URLhttps://help.ubuntu.com/BUG_REPORT_URLhttps://bugs.launchpad.net/ubuntu/PRIVACY_POLICY_URLhttps://www.ubuntu.com/legal/terms-and-policies/privacy-policyUBUNTU_CODENAMEnobleLOGOubuntu-logochipcampChipCamp:~/src/temp/nerv$----可以看出nerv项目在Ubuntu24.04 LTS版本及配套的riscv64-unknown-elf-gcc 13.2.0下是一键Make运行的。----考虑到现在的时间点Ubuntu24.04LTS不算很老因此nerv仍然可以认为是零门槛体验的。----顺便看一下上一个例子darkriscv的make all失败在riscv64-unknown-elf-gcc编译过程中看看在Ubuntu24.04 LTS with riscv-gcc-13.2是否还存在。如下。chipcampChipCamp:~/src/temp/nerv$ /usr/bin/riscv64-unknown-elf-gcc --versionriscv64-unknown-elf-gcc (13.2.0-11ubuntu112) 13.2.0Copyright (C) 2023 Free Software Foundation, Inc.This is free software; see the source for copying conditions. There is NOwarranty; not even for MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.chipcampChipCamp:~/src/temp/nerv$ cat /etc/os-releasePRETTY_NAMEUbuntu 24.04.3 LTSNAMEUbuntuVERSION_ID24.04VERSION24.04.3 LTS (Noble Numbat)VERSION_CODENAMEnobleIDubuntuID_LIKEdebianHOME_URLhttps://www.ubuntu.com/SUPPORT_URLhttps://help.ubuntu.com/BUG_REPORT_URLhttps://bugs.launchpad.net/ubuntu/PRIVACY_POLICY_URLhttps://www.ubuntu.com/legal/terms-and-policies/privacy-policyUBUNTU_CODENAMEnobleLOGOubuntu-logochipcampChipCamp:~/src/temp/nerv$ cd ..chipcampChipCamp:~/src/temp$ git clone https://gitcode.com/chipcamp/darkriscv.gitCloning into darkriscv...remote: Enumerating objects: 3796, done.remote: Total 3796 (delta 0), reused 0 (delta 0), pack-reused 3796 (from 1)Receiving objects: 100% (3796/3796), 4.96 MiB | 698.00 KiB/s, done.Resolving deltas: 100% (2536/2536), done.chipcampChipCamp:~/src/temp$ cd darkriscvchipcampChipCamp:~/src/temp/darkriscv$ make allmake -C src allmake[1]: Entering directory /home/chipcamp/src/temp/darkriscv/src/usr/bin/riscv64-unknown-elf-gcc-marchrv32i_zicsr-mabiilp32-mlittle-endian-c -o boot.o boot.S/usr/bin/riscv64-unknown-elf-cpp -P -DMLEN$(awk /define MLEN/ { print 2**$3 } ../rtl/config.vh) darksocv.lds darksocv.ldmake -C darkshell allmake[2]: Entering directory /home/chipcamp/src/temp/darkriscv/src/darkshell/usr/bin/riscv64-unknown-elf-gcc -Wall -fcommon -ffreestanding -Os -fno-delete-null-pointer-checks-mlittle-endian-marchrv32i_zicsr -mabiilp32 -Idarklibc/include -I../darklibc/include -D__RISCV__ -DBUILD\Wed, 07 Oct 2026 13:36:01 0800\ -DARCH\rv32i_zicsr\ -mno-div -mcmodelmedany -S main.c -o main.s/usr/bin/riscv64-unknown-elf-as -marchrv32i_zicsr -mabiilp32-mlittle-endian-c main.s -o main.o/usr/bin/riscv64-unknown-elf-ar -rcs darkshell.a main.o/usr/bin/riscv64-unknown-elf-ranlib darkshell.asources ok for darkshell.a.make[2]: Leaving directory /home/chipcamp/src/temp/darkriscv/src/darkshellmake -C darklibc allmake[2]: Entering directory /home/chipcamp/src/temp/darkriscv/src/darklibc/usr/bin/riscv64-unknown-elf-gcc -Wall -fcommon -ffreestanding -Os -fno-delete-null-pointer-checks-mlittle-endian-marchrv32i_zicsr -mabiilp32 -Idarklibc/include -I../darklibc/include -D__RISCV__ -DBUILD\Wed, 07 Oct 2026 13:36:01 0800\ -DARCH\rv32i_zicsr\ -mno-div -mcmodelmedany -Iinclude -S stdio.c -o stdio.s/usr/bin/riscv64-unknown-elf-gcc -Wall -fcommon -ffreestanding -Os -fno-delete-null-pointer-checks-mlittle-endian-marchrv32i_zicsr -mabiilp32 -Idarklibc/include -I../darklibc/include -D__RISCV__ -DBUILD\Wed, 07 Oct 2026 13:36:01 0800\ -DARCH\rv32i_zicsr\ -mno-div -mcmodelmedany -Iinclude -S io.c -o io.s/usr/bin/riscv64-unknown-elf-gcc -Wall -fcommon -ffreestanding -Os -fno-delete-null-pointer-checks-mlittle-endian-marchrv32i_zicsr -mabiilp32 -Idarklibc/include -I../darklibc/include -D__RISCV__ -DBUILD\Wed, 07 Oct 2026 13:36:01 0800\ -DARCH\rv32i_zicsr\ -mno-div -mcmodelmedany -Iinclude -S string.c -o string.s/usr/bin/riscv64-unknown-elf-gcc -Wall -fcommon -ffreestanding -Os -fno-delete-null-pointer-checks-mlittle-endian-marchrv32i_zicsr -mabiilp32 -Idarklibc/include -I../darklibc/include -D__RISCV__ -DBUILD\Wed, 07 Oct 2026 13:36:01 0800\ -DARCH\rv32i_zicsr\ -mno-div -mcmodelmedany -Iinclude -S misc.c -o misc.s/usr/bin/riscv64-unknown-elf-gcc -Wall -fcommon -ffreestanding -Os -fno-delete-null-pointer-checks-mlittle-endian-marchrv32i_zicsr -mabiilp32 -Idarklibc/include -I../darklibc/include -D__RISCV__ -DBUILD\Wed, 07 Oct 2026 13:36:01 0800\ -DARCH\rv32i_zicsr\ -mno-div -mcmodelmedany -Iinclude -S unistd.c -o unistd.s/usr/bin/riscv64-unknown-elf-as -marchrv32i_zicsr -mabiilp32 -mlittle-endian -c stdio.s -o stdio.o/usr/bin/riscv64-unknown-elf-as -marchrv32i_zicsr -mabiilp32 -mlittle-endian -c io.s -o io.o/usr/bin/riscv64-unknown-elf-as -marchrv32i_zicsr -mabiilp32 -mlittle-endian -c string.s -o string.o/usr/bin/riscv64-unknown-elf-as -marchrv32i_zicsr -mabiilp32 -mlittle-endian -c misc.s -o misc.o/usr/bin/riscv64-unknown-elf-as -marchrv32i_zicsr -mabiilp32 -mlittle-endian -c unistd.s -o unistd.o/usr/bin/riscv64-unknown-elf-gcc -marchrv32i_zicsr -mabiilp32 -mlittle-endian -c -o util.o util.S/usr/bin/riscv64-unknown-elf-ar -rcs darklibc.a stdio.o io.o string.o misc.o unistd.o util.o/usr/bin/riscv64-unknown-elf-ranlib darklibc.asources ok for darklibc.a.make[2]: Leaving directory /home/chipcamp/src/temp/darkriscv/src/darklibc#/usr/bin/riscv64-unknown-elf-ranlib darkshell/darkshell.a darklibc/darklibc.a/usr/bin/riscv64-unknown-elf-ld -Tdarksocv.ld -Mapdarksocv.map -m elf32lriscv -static -gc-sections --entry_start -o darksocv.o boot.o darkshell/darkshell.a darklibc/darklibc.a/usr/bin/riscv64-unknown-elf-ld: warning: darksocv.o has a LOAD segment with RWX permissions/usr/bin/riscv64-unknown-elf-objdump -D darksocv.o darksocv.S/usr/bin/riscv64-unknown-elf-objcopy -O binary darksocv.o darksocv.binhexdump -ve 1/4 %08x\n darksocv.bin darksocv.memdd ifdarksocv.bin ofdarksocv_uart.bin skip512 bs174400 records in74400 records out7440 bytes (7.4 kB, 7.3 KiB) copied, 0.00403438 s, 1.8 MB/srm darksocv.bin# uncomment for MIF file#awk BEGIN { print DEPTH 1024;\nWIDTH 32;\nADDRESS_RADIX HEX;\nDATA_RADIX HEX;\nCONTENT\nBEGIN } { printf(%08x : %s\n,NR-1,); } END { print END; } darksocv.mem darksocv.mifwc -l darksocv.mem1988 darksocv.memmem ok for little-endian.echo build is ok for darksocv.membuild is ok for darksocv.memmake[1]: Leaving directory /home/chipcamp/src/temp/darkriscv/srcmake -C sim allmake[1]: Entering directory /home/chipcamp/src/temp/darkriscv/simiverilog -Wall -I ../rtl -o darksocv darksimv.v ../rtl/darksocv.v ../rtl/darkbridge.v ../rtl/darkuart.v ../rtl/darkriscv.v ../rtl/darkpll.v ../rtl/darkram.v ../rtl/darkio.v ../rtl/darkcache.v ../rtl/darkmac.v ../rtl/lib/sdram/mt48lc16m16a2_ctrl.vecho VCDSdarksocv.vcd: XSIMdarksocvVCDSdarksocv.vcd: XSIMdarksocvdpram: unified BRAM w/ 2048x32-bitWARNING: ../rtl/darkram.v:88: $readmemh(../src/darksocv.mem): Not enough words in the file for the requested range [0:2047].VCD info: dumpfile darksocv.vcd opened for output.reset (startup)sdram: CLK: 64 MHzsdram: WAIT_100US: 6400 cyclessdram: TRP: 2 cyclessdram: TRC: 5 cyclessdram: TRCD: 2 cyclessdram: TCH: 1 cyclessdram: CAS_LATENCY: 2 cyclesvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvrrrrrrrrrrrrr vvvvvvvvvvvvvvvvvvvvvvvvvvrrrrrrrrrrrrrrrr vvvvvvvvvvvvvvvvvvvvvvvvrrrrrrrrrrrrrrrrrr vvvvvvvvvvvvvvvvvvvvvvvvrrrrrrrrrrrrrrrrrr vvvvvvvvvvvvvvvvvvvvvvvvrrrrrrrrrrrrrrrrrr vvvvvvvvvvvvvvvvvvvvvvvvrrrrrrrrrrrrrrrr vvvvvvvvvvvvvvvvvvvvvvrrrrrrrrrrrrr vvvvvvvvvvvvvvvvvvvvvvrr vvvvvvvvvvvvvvvvvvvvvvrr vvvvvvvvvvvvvvvvvvvvvvvv rrrrrr vvvvvvvvvvvvvvvvvvvvvvvvvv rrrrrrrrrr vvvvvvvvvvvvvvvvvvvvvv rrrrrrrrrrrrrr vvvvvvvvvvvvvvvvvv rrrrrrrrrrrrrrrrrr vvvvvvvvvvvvvv rrrrrrrrrrrrrrrrrrrrrr vvvvvvvvvv rrrrrrrrrrrrrrrrrrrrrrrrrr vvvvvv rrrrrrrrrrrrrrrrrrrrrrrrrrrrrr vv rrrrrrrrrrrrrrrrrrrrrrrrrrrrrrrrrr rrrrrrrrrrrrrrrrrrrrrrrrrrrrrrrrrrrrrr rrrrrrrrrrrrrrrrrrrrrrrrrrrrrrrrrrrrrrrrrr rrrrrrrrrrrrrrrrrrrrrrINSTRUCTION SETS WANT TO BE FREEboot0: main0200 stack1f7cboard: simulation only (id0)build: Wed, 07 Oct 2026 13:36:01 0800 for rv32i_zicsrcore0: darkriscv100MHz rv32i little-endianbram0: text02001418 data161808f8 stack2000bram0: 240 bytes freeuart0: 115.2kbps (div25603)timr0: 1000Hz (div99999)csrxx: not foundstvec: not foundmtvec: not found (polling)Welcome to DarkRISCV!495 ^C** VVP Stop(0) **** Flushing output streams.** Current simulation time is 509455000 ticks. finish** Continue **make[1]: *** [Makefile:98: darksocv.vcd] Interruptmake: *** [Makefile:47: all] InterruptchipcampChipCamp:~/src/temp/darkriscv$----没有问题。改用Ubuntu 24.04 LTS系统配套的riscv64-unknown-elf-gcc则是13.2版本darkriscv项目的firmware.hex就可以正常编译了在Ubuntu 22.04 LTS版本下gcc版本低而出现的-mlittle-endian选项不支持的问题消失了。完END关键词nerv, riscv64-unknown-elf-gcc, systemverilog, interface, modport, pack, struct, always_ff。摘要本文记录了开源RISC-V项目nerv的make体验过程。在Ubuntu 22.04 LTS所配套的riscv-gcc-10.x版本不支持-mlittle-entian而build失败的问题在Ubuntu 24.04 LTS所配套的riscv-gcc-13.2版本则没有问题。这个nerv项目虽然以.sv文件标示SystemVerilog语言但实际上它没有使用SystemVerilog相对Verilog语言的任何主要语法如interfacemodportpackstructalways_ff等。附送Verilog vs SystemVerilog Summary。END of 附录